Conventionally, an electrical pad is provided at an upper part of semiconductor device, in which a semiconductor element has formed. The electrical pad is contacted with a probe needle to check a performance of the semiconductor element, or is subjected to a wire bonding connection. For example, a semiconductor device with such a configuration is disclosed in JP-A-2010-153901 (corresponding to US 2003/0173667 A1 and US 2003/0173668 A1).
In JP-A-2010-153901, a semiconductor device (an integrated circuit) is disclosed. In the semiconductor device, a wiring region is formed on a substrate, a passivation layer with multiple openings is formed on the wiring region, and a bonding pad is connected to the wiring region through the multiple openings. The bonding pad has a first wire bonding region and a second wire bonding region. The size of the electrical pad in JP-A-2010-153901 is lager than a size of a normal electrical pad.
The inventors of the present disclosure have found the followings.
In the semiconductor device, which has the electrical pad at the upper part, due to an insertion of the probe needle into the electrical pad or due to an impact occurred when a bonding is performed to the electrical pad, the electrical pad may be scraped, and may become thin. When the electrical pad becomes thin, a stress from the external portion easily propagates to a lower layer of the electrical pad and a difficulty such as a crack or the like may be prone to occur below the electrical pad.
In JP-A-2010-153901, the size of the electrical pad is large, and a probing and a bonding are performed at different places. However, when a strong impact is applied to the electrical pad at one time, or when impacts are applied repeatedly, the impact may not be absorbed by the electrical pad. The stress may propagate to the lower layer of the electrical pad and the crack may occur.